What's the difference between pre-layout and post-layout PCB simulation?
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- K.F International Limited
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- Cindy
- Issue Time
- Sep 25,2013
Summary
What's the difference between pre-layout and post-layout PCB simulation?
What's the difference between pre-layout and post-layout PCB simulation?
Success in electronic design often hinges on running simulations. Whether signal integrity, power integrity, electromagnetic compatibility, analog, or even thermal simulations, they reveal information about design feasibility, margins, and limitations. We may perform simulations both before and after board layout, with different purposes, but the goal remains the same—to drive design changes.
The main difference between pre-layout and post-layout is that pre-layout simulations take place before completing the PCB layout, while post-layout simulations use the completed PCB layout as their basis. With signal-integrity simulations, for example, that means exact lengths of traces can be used in the post-layout analysis. Furthermore, criteria such as proximity of traces to via antipads and other plane voids also can be included in the analysis, depending on the amount of detail.
In pre-layout and post-layout, we translate physical parameters into circuit elements and other mathematical models for simulation. However, for pre-layout simulation, we must build up a circuit schematic to include all elements of the simulation. For signal-integrity purposes, this includes IC buffer models, package models, trace models, vias, discrete components, and any connectors and cables. In terms of power integrity, this includes plane shapes, stitching vias, capacitors, power sources, and loads (ICs).
Post-layout simulation involves extraction of physical information from the routed board. Items like traces, planes, and vias with defined geometries are automatically modeled, as are simpler components such as discrete devices. We add models for the ICs, connectors, and other connected components to run simulations. In each case, these user inputs are translated into a simulation schematic used by the simulator. Moreover, both types of simulations have the same simulation results. For signal-integrity simulations, the results appear as time/voltage waveforms that identify signal quality and timing information, and they can be displayed as waveforms or tables of data.
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